at Intel in Springfield, Illinois, United States
Job Description
Job Description
Come join Intel ‘s High-Speed IO PHY Design Group as a Pre-Silicon Validation/Verification Engineer. We are seeking an experience Verification engineer to work with a diverse team designing Intel’s next generation products and are looking for someone who has passion around improving the way we solve complex problems through team work as well as their own direct contributions.
In this role, your responsibilities will include (but not limited to):
Ensuring the logical design of an IP/subsystem/SoC satisfies the architectural specification
Analyzing microarchitectural features to identify possible problem areas, mainly focusing on DFX
Creating test plans for RTL validation and developing pre Silicon functional validation collaterals (BFM, test sequences, checkers, scoreboard, coverage) to verify system will meet design requirements.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Candidate must have a bachelor’s degree in electrical/computer engineering or computer science or any STEM related field with 3+ years of relevant experience – OR – a master’s degree in electrical/computer engineering or computer science or any STEM related field with 2+ years of relevant experience in one or more of the following:
Pre-Si verification
Architecting and developing test benches and verification components like bus functional models, test sequences and scoreboards/checkers
System Verilog based OVM/UVM, and coverage driven ASIC verification methodology
Preferred Qualifications
Familiarities with DFX and PCIE PHY architecture is a plus
Inside this Business Group
IP Engineering Group’s (IPG) vision Build IPs that power Intel’s leadership products and power our customer’s silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel’s silicon design process. IPG’s guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
Other Locations
US, CA, Folsom; US, CA, Santa Clara
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)
Annual Salary Range for jobs which could be performed in US, California: $102,540.00-$153,580.00
*Salary range dependent on a number of factors including location and experience
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
