at Intel in Springfield, Illinois, United States
About the Technology Development Group:
Technology Development (TD) is the heart and soul of Moore’s Law at Intel, enabling Intel to create world-changing technology that enriches the lives of every person on earth. TD’s more than 13,000 employees drive breakthrough research, develop next generation process and packaging technologies, while also running high volume manufacturing operations in its state-of-the-art facilities in Oregon and Arizona.
The Design Enablement team in TD works closely with the technology team to maximize the value proposition of the technology for our customers thru Design Technology Co-Optimization (DTCO) and delivers the Process Design Kits (PDKs) and Foundation IP (FIP) that designers need to support their product design work and fully leverage the technology. The DE organization scope includes technology design rules & models, technology and IP testchips, Process Design Kits (PDKs) and Foundational IP.
About the Role:
+ Creates methodologies, models, and flows for advanced design rules for a specific process node and characterizes those models through silicon validation.
+ Ensures IP and SoC design meets requirements and standards for a specific manufacturing process technology.
+ Identifies ways to optimize silicon designs by evaluating device performance over a range of operating conditions.
+ Resolves prototype issues and determines whether problems are design or process related.
+ Conducts experiments to identify potential challenges in the process and ensure that the process meets yield, quality, and reliability standards.
+ Drives continuous improvements to enhance the designs, materials, and methodologies.
+ Designs, validates, and characterizes analog building block devices and template cells.
+ Disseminates process development information to design groups, ensures it meets future product requirements, and extracts necessary technical and device performance data for IP and SoC designs.
+ Works with IP and SoC design teams to capture and optimize process requirements to enable competitive designs and products.
+ As a principal engineer, recognized as a domain expert who influences and drives technical direction across Intel and industry. Develops and mentors other technical leaders, grows the community, acts as a change agent, and role models Intel values. Aligns organizational goals with technical vision, formulates technical strategy to deliver leadership solutions, and demonstrates a track record of relentless execution in bringing products and technologies to market.
+ Knowledge of the CMOS ASIC design flow.
+ Custom digital circuit design, simulation, layout design, and verification
+ Knowledge of EDA tools used for analog, digital and mixed-signal circuit design.
+ Post-Si validation experience
+ Design, characterization, and verification of custom memory circuits such as SRAM, Register Files, ROM, DRAM, MRAM, etc.
+ Design trade-offs between power, performance, and area (PPA)
+ Design technology co-optimization (DTCO)
+ Master’s degree in electrical engineering, computer engineering or a related discipline. PhD preferred.
+ 10 years of professional experience gained through either internships or full-time employment.
Inside this Business Group
As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art — from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)
Annual Salary Range for jobs which could be performed in US, Colorado, New York, Washington, California: $180,270.00-$288,770.00
*Salary range dependent on a number of factors including location and experience
This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.